EE295 - ASIC Design Using VHDL 
 Std 1076-1993 
 Assignment: Read Ch 1 
 We discuss Changes in the VHDL Standard as a Result of Revalidation.
 Outline 
- Examples Added
 - More Footnotes
 - CrossReferences
 - Index
 
label:entity library_name.entity_name(architecture_name) port map..
label:configuration config_name port map..
Static Expressiosn Now Legal in Port Maps
U1:AND port map ( A => '1',
- You Used to Have to Provide Your Own Conversion Functions
 - U1:AND port map ( A => bit( true ), boolean( B ) => my_var
 
- [pure|impure] function identifier
 
- pure
 - Returns the Same Value When Called with the Same Actual Parameters
 - impure
 - May Return Different Values. Update Objects Outside of Their Scope.
 
- VHDL Not Used for Implimentation
 - example:
 - function foobar return integer;
- attribute FOREIGN of foobar:function is "Some Useful Implimentation String";
 
 
-  procedure FILE_OPEN ( file f : ftype;
-  External_Name: in string;
 -  Open_Kind : in File_Open_Kind := READ_MODE );
 
 
-  procedure FILE_OPEN ( Status : out FILE_OPEN_STATUS;
- file f : ftype;
 -  External_Name: in string;
 -  Open_Kind : in File_Open_Kind := READ_MODE );
 
 
- File_Open_Kind Values:
- READ_MODE
 - WRITE_MODE
 - APPEND_MODE
 
 - Status Values:
- OPEN_OK
 - File Opened Successfully
 - STATUS_ERROR
 - File Object Already has an External File Associated With it
 - NAME_ERROR
 - External File Does Not Exist
 - MODE_ERROR
 - External FIle Can Not Open With Requested File_Open_Kind
 
 
- procedure FILE_CLOSE ( file f : ftype )
 
- procedure READ ( file f : ftype; Value : out vtype; Length : out Natural );
 - --Returns length of 'value'
 
- type data_file is file of integer;
 - 
 - file f1 : data_file;
 - --No Implicit FILE_OPEN
 - file f1 : data_file is "test.dat";
 - --Implicit FILE_OPEN w/ READ_MODE Default
 - file f1 : data_file open WRITE_MODE is "test.dat";
 - --Implicit FILE_OPEN w/ WRITE_MODE
 
- Files can be Passed to SubPrograms as Parameters
 
- sll
- srl
 
 - shift left/right logical. Filled with T'left of Base Type
 - sla
- sra
 
 - shift left/right arithmetic. Filled with T(T'right)
 - rol
- ror
 
 - rotate left/right logical.
 
- [label:] target <= [transport|[reject time] inertial] waveform;
 - waveform : waveform_element {,waveform_element } | unaffected
 - When Conditions are Met There is no Change to Target Signal Drivers.
 
Now Supports ISO-8859-I Charater Set for European Languages
- Basic Identifiers
 - consists of letters, digits & underscores
 - Extended Identifiers
 - Consist of Any Characters. Examples
- \port map my entity\ --distinct
 - \PORT MAp my enTITy\ --  identifiers
 - \I like to use \\ back slash\
 
 
-  Previously Limited to Immediate Enclosing Process
 - New Prefix Keyword Shared
 - When Shared, Permitted in Declarative Regions for:
-  Block
 -  Entity
 -  Architecture
 -  Package
 - 
 
 -  Example:
 -  Shared Variable pi : real := 3.14 ;
 - 
 
Additions are in [] braces
-  Uniform Is Syntax
-  Block [ is ]
 -  Component comp_name [ is ]
 
 -  New, Uniform Ending Syntax:
-  end  component [ comp_name ];
 -  end [ architecture ] arch_name;
 -  end [ entity ] entity_name;
 -  end [ package body ] pkg_name;
 -  end case [ case_label ];
 -  end if [ if_label ];
 -  end [ record ] record_name;
 -  end [ function ] func_name;
 -  end [ procedure ] proc_name;
 
 
- t'ASCENDING
 - Returns True if scalar type t has ascending range
 - a'ASCENDING(n)
 - Returns True nth index of array type a has ascending range
 - t'IMAGE(x) 
 - Returns string representation of the value of x of scalar type t
 - s'DRIVING  
 - Returns False if no Active Drivers in Current Process
 - e'INSTANCE_NAME
 - Returns string describing hierarchical path to entity e including instantiated architectures
 - e'PATH_NAME 
 - Returns string describing hierarchical path to entity e excluding architectures
 
In Order to Unconditionally Output a Message You Used to..
- assert false .. "unconditional message"
 - Has Been Replaced by..
 - report "unconditional message.."
 
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Copyright 1995, James Swift 
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