See Also

Control equations are Boolean equations used in the Logic Section to set up the state machine clock, reset, and clock enable signals.

The following examples show Boolean control equations:

ss.clk = clk1;
ss.reset = a & b;
ss.ena = clk1ena;

Boolean control equations have the following characteristics:

• You can define the clock, reset, and clock enable inputs of each state machine in the format <state machine name>.<port name>. In the example above, these inputs are defined for the state machine ss.

• You can use the state machine name declared in the State Machine Declaration as the state machine name in the control equations.

• The clock signal <state machine name>.clk must always be assigned a value.

• If the start state of the state machine has been assigned a non-zero value, the reset signal <state machine name>.reset assignment is required; otherwise, it is optional.

• Assigning the clock enable signal <state machine name>.ena to a value is always optional.

• A semicolon (;) ends each equation.

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