Specifies the maximum acceptable pin-to-pin delay (tPD), that is, the time required for a signal from an input pin to propagate through combinatorial logic and appear at an external output pin. You can also use this assignment to specify the maximum point-to-point delays within the device. The following table prioritizes each legal assignment type, and shows which paths are affected when assigned. Priority 1 assignments take precedence over priority 2 assignments, and so on. Within a priority level, the most stringent requirement takes precedence. Specifying a point-to-point tpd Requirement assignment may increase the time necessary for timing-driven compilation.
| Priority Level | Assignment Type/Location | Affected Path(s) |
|---|---|---|
| 1 |
Point-to-point assignment from an input or bidirectional pin to an output or bidirectional pin. |
All paths between the specified pins. |
| 2 |
Single point assignment to an input or bidirectional pin. |
All fan-out paths from the pin. |
| 3 |
Point-to-point assignment from pin to register. Point-to-point assignment from register to register. Point-to-point assignment from register to pin. |
All paths between the specified source and destination. |
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