| CAUSE: | The specified WYSIWYG RAM primitive has a value for the specified actual RAM DATA_WIDTH that is different from the specified declared DATA_WIDTH parameter. |
| ACTION: | Check the design file to make sure the parameters and the logic feeding the datain ports have the same width value. If the parameters are correct and you are using an EDA tool, contact the technical support for the EDA tool regarding this message. Otherwise, contact Altera Applications for assistance. |
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