Quartus

clk1 port of LVDS transmitter PLL <name> can fan out only to one output pin

CAUSE: The clk1 port of the specified LVDS transmitter PLL either does not feed an output pin or feeds more than one output pin. The clk1 port of the LVDS transmitter PLL must feed exactly one output pin.
ACTION: Edit the design so the clk1 port of the LVDS transmitter PLL feeds exactly one output pin.

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