Quartus

Can't place ClockLock PLL <name> in ClockLock PLL_<number> circuitry because another ClockLock PLL in the design is already using the global signal required the <type> port

CAUSE: The Fitter cannot place the specified ClockLock PLL at the specified location because another ClockLock PLL in the design is already using the global signal required by the specified port.
ACTION: Modify the design so that there are no restrictions on placing the ClockLock PLL in the ClockLock PLL circuitry. For example, remove any pin assignments you may have made.

See also:

Deleting Assignments in the Assignment Organizer Dialog Box
Overview: Making Assignments
Overview: Working with Assignments in the Floorplan Editor

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