CAUSE: | You specified the target device and compiled the current design. However, the Fitter cannot place the design in the target device because the design requires more logic cells than the device can contain. |
ACTION: | Select a larger device or reduce the number of logic cells in the design. You can try to reduce the number of logic cells by turning on Perform WYSIWYG primitive resynthesis in the Netlist Optimizations page of the Settings dialog box and setting the Optimization Technique logic option to Area. |
See also:
Optimizing Netlists During Synthesis & Fitting
Specifying the Device Family & Device for Compilation
Specifying Settings for Default Logic Options
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