CAUSE: | You created a double data rate (DDR) pin group that consists of a clock, a PLL, and DQS I/O pin and its DQ I/O pins. You made location assignments for the pins for the DDR pin group driven by the specified clock. However, the Fitter cannot place all the DQS I/O pins driven by the clock pin in the assigned location because there are not enough pins in the device. This error can also occur when you have not made any location assignments for the DDR pin group. The Fitter tried to place the DDR pin group on a side of the device, but found no side with enough empty pins. |
ACTION: | Change or delete location assignments to provide more pins in the device for placing DQS and DQ I/O pins. |
See also:
Assigning an Entity or Node to a Location
Changing Assignments
Deleting Assignments in the Assignment Organizer
Overview: Making Assignments
Overview: Working with Assignments in the Floorplan Editor
- PLDWorld - |
|
Created by chm2web html help conversion utility. |