Quartus

Fast PLL <name> uses the comparator input port, but the enable0 and enable1 outputs must come from different counters

CAUSE: The specified fast PLL uses comparator input port, but the enable0 and enable1 outputs come from the same counter. If the comparator input port is used, the enable0 and enable1 outputs must come from different counters.
ACTION: Modify the design so that enable0 and enable1 outputs come from different counters of the fast PLL.

- PLDWorld -

 
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