Quartus

Verilog HDL Compiler Directive error at <location>: must use `ifdef directive with `elsif directive

CAUSE: In a Verilog Design File (.v) at the specified location, you used an `elsif directive, but did not specify a corresponding `ifdef directive.
ACTION: Add an `ifdef directive or remove the `elseif directive.

See also:

Section 19.4 of the IEEE Std. 1364-2001 IEEE Standard Verilog Hardware Description Language manual

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