Quartus

Verilog HDL error at <location>: range index cannot be a real number

CAUSE: In a Verilog Design File (.v) at the specified location, you used a floating-point value when defining a range. Since a range represents a number of bits, a real number value is not legal in a range.
ACTION: Make sure all values in the range specification evaluate to an integer.

See also:

Sections 3.9 of the IEEE Std. 1364-2001 IEEE Standard Verilog Hardware Description Language manual

- PLDWorld -

 
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