| CAUSE: | You tried to create a symbol for a VHDL Design File (.vhd). However, the Entity Declaration in the VHDL Design File contains ports with types that are too complex (for example, ports with integer types or unconstrained array types). As a result, the Quartus II software cannot create a symbol from the VHDL Design File. |
| ACTION: | Change the types of the ports in the VHDL Design File to simple types, such as bit types or one-dimensional array types. |
See also:
Creating a Block Symbol File for a Current File
Sections 1.1 and 3 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
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