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VHDL Component Declaration error at <location>: port <name> is listed for component, but not listed for entity <name>

CAUSE: In a Component Declaration at the specified location in a VHDL Design File (.vhd), you listed the specified port for a component that is based on the specified entity. However, you did not list the port in the entity's Entity Declaration. The ports you list for a component in a Component Declaration must be the same as the ports you list for the corresponding entity in an Entity Declaration.
ACTION: Make sure the ports for the component in the Component Declaration match the ports in the Entity Declaration for the corresponding entity.

See also:

Sections 1.1 and 4.5 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual

- PLDWorld -

 
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