CAUSE: | In a VHDL Design File (.vhd) at the specified location, you used an Exit Statement outside of a Loop Statement. You can use an Exit Statement only inside of a Loop Statement. |
ACTION: | Make sure the design uses Exit Statements only within Loop Statements. |
See also:
Sections 8.9 and 8.11 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
- PLDWorld - |
|
Created by chm2web html help conversion utility. |