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VHDL Loop Statement error at <location>: loop must terminate at or before 1000 iterations

CAUSE: In a Loop Statement at the specified location in a VHDL Design File (.vhd), you specified a loop that does not terminate after 1000 iterations. This message may occur because of an error in the Loop Statement's WHILE iteration scheme, FOR iteration scheme, or Exit Statement; or because you did not increment the variable for the loop.
ACTION: Make sure that the Loop Statement specifies a loop that terminates in 1000 or less iterations.

See also:

Section 8.9 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual

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