| CAUSE: | In an expression at the specified location in a VHDL Design File (.vhd), you used the specified operator for real values. However, you cannot use an operator for operands that are real values. |
| ACTION: | Change the operator to one that you can use with real values. |
See also:
Sections 3.1.4 and 7.2 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
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