CAUSE: | In a Subtype Declaration at the specified location in a VHDL Design File (.vhd), you declared a subtype for the specified array type. However, both the subtype and the type are constrained, that is, both have a range. If a type has a range, the subtype that is based on the type cannot have a range. |
ACTION: | Remove the range from the subtype or type. |
See also:
Sections 3.1, 4.1, and 4.2 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
- PLDWorld - |
|
Created by chm2web html help conversion utility. |