| CAUSE: | In a Subprogram Body at the specified location in a VHDL Design File (.vhd), you used a Signal Declaration. However, you cannot use a Signal Declaration in a Subprogram Body. |
| ACTION: | Remove the Signal Declaration from the Subprogram Body, or place the Signal Declaration outside the Subprogram Body. |
See also:
Sections 2.2 and 4.3.1.2 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
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