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VHDL Variable Assignment Statement error at <location>: Variable Assignment Statement must use := to assign value to variable <name>

CAUSE: In a Variable Assignment Statement at the specified location in a VHDL Design File (.vhd), you used something other than := to assign a value to the specified variable. However, you must use:= to assign a value to a variable.
ACTION: Make sure you use := in the Variable Assignment Statement.

See also:

Section 8.5 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual

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