Quartus

Can't estimate HardCopy fmax for any clocks in design


CAUSE:

You ran a timing analysis on the current design and then performed a HardCopy performance estimation on the design. However, the Performance Estimator cannot estimate the HardCopy fMAX for any clock signal in the design because the Timing Analyzer did not report any clock signal fMAX for the Performance Estimator to use. The Timing Analyzer did not report fMAX for any of the clock signals in the design because of one of the following reasons:

  • Each clock signal in the design is a nonoperational clock signal.

  • The design contains complex timing assignments, and therefore the Timing Analyzer reported slack instead of fMAX for the clock signals in the design.

  • The design does not contain any register-to-register paths.

ACTION: If you want, perform a HardCopy performance estimation on a design for which the Timing Analyzer can report clock signal fMAX. Otherwise, no action is required.

See also:

Running a Timing Analysis

- PLDWorld -

 

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