Quartus

<path element number>: + <increment delay> = <total delay>; Loc. = <location name>; <node type> Node = '<node name>'

CAUSE: The Timing Analyzer is reporting the increment delay (the delay through the specified node of the specified type), and the total delay (the cumulative total delay up to the node). The increment delay is the sum of the interconnect delay (IC) and cell delay (CELL).
ACTION: No action is required. You can view the results of timing analysis in the Compilation Report.

See also:

Running a Timing Analysis

- PLDWorld -

 
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