CAUSE: | You compiled a design from within the resynthesis\adt directory. However, either a TCL Script File (.tcl) generated by the PALACE software that is necessary for the Quartus II software to compile the project or the Verilog Quartus Mapping File (.vqm) does not exist in the resynthesis/adt directory. |
ACTION: | Click OK to close the message dialog box, and refer to the messages that appear above this message in the Messages window or the error.log file in the resynthesis\adt directory for more information on why the TCL Script File or VQM File was not generated. |
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