CAUSE: |
You used the Assignment Organizer command (Tools menu) to specify a delay value for the specified node with the FastRow Interconnect Delay logic option; however, the specified delay cannot be achieved because the specified pin does not feed the FastRow interconnect. The requested delay is available only on the FastRow interconnect path. Both the pin and its fan-out(s) must be assigned to the same Fast region. The FastRow Interconnect and FastRow Interconnect Delay logic options are ignored if they are applied to anything other than a column (vertical) pin that is implemented as an input or bidirectional pin. |