| CAUSE: | You assigned the Virtual Pin logic option to the specified node that is not an input or output pin. However, you must assign the Virtual Pin logic option only to input or output pins. When this condition occurs, the Compiler ignores the Virtual Pin logic option assignment to the node. |
| ACTION: | No action is required. However, to avoid receiving this message in the future, remove the Virtual Pin assignment from the node. |
See also:
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- PLDWorld - |
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