CAUSE: | During simulation, the content-addressable memory (CAM) wrote a 1 into the 32nd bit of an even address or a 0 into the 32nd bit of an odd address at the specified time in the vector source file while the MATCH_MODE parameter is set to MULTIPLE . However, the outputselect and wdatain must have the same logic level if the the MATCH_MODE parameter of a CAM is set to MULTIPLE . |
ACTION: | Edit the vector source file so the outputselect and wdatain are the same logic level at all times during a write cycle. |
- PLDWorld - |
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