CAUSE: | You attempted to simulate a design using the vector source file you specified. However, the vector source file contains the specified node of the specified width, which does not match the node type and/or width of the same node in the design. This condition may produce an inaccurate simulation. |
ACTION: | To produce an accurate simulation, enter the correct signal type and/or width for the specified node in the vector source file. |
See also:
Changing a Node or I/O Type
Specifying Simulator Time & Vector Settings
- PLDWorld - |
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