Quartus

LVDS receiver input skew margin is negative <number> on data pin <name>. LVDS circuit may not operate.


CAUSE: The Timing Analyzer is reporting the specified negative receiver input skew margin (RSKM) for the specified data pin in an LVDS circuit in the design. As a result, the LVDS circuit may no operate.
ACTION: Reduce the transmitter channel-to-channel skew (TCCS) between the clock and data pin until the RSKM is 0 or greater.

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