CAUSE: | You created a clock setting. However, the Timing Analyzer is reporting that clock period for the specified clock must be greater than or equal to the specified period due to the clock low (tCL) and clock high (tCH) limits for the currently selected device and/or the clock pin or output pin edge rate. |
ACTION: | Change the clock settings so that the clock period is greater than or equal to the specified value. |
See also:
Creating Clock Settings
Editing Clock Settings
Overview: Using Clock Settings
Overview: Using the Timing Analyzer
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