CAUSE: | In a Subtype Declaration or Type Declaration at the specified location in a VHDL Design File (.vhd), you declared a range for a subtype or type. However, you either specified an ascending range and specified a left bound for the range that is larger than the range's right bound, or you specified a descending range and specified a right bound for the range that is larger than the range's left bound. As a result, the range is empty, or null. Integrated Synthesis switched the left bound and right bound so that the range contains a valid set of indices. |
ACTION: | To avoid receiving this message in the future, switch the left and right bounds of the range so that an ascending range has a right bound that is larger than the left bound, or so that a descending range has a left bound that is larger than the right bound. Otherwise, no action is required. |
See also:
Sections 4.1 and 4.2 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
- PLDWorld - |
|
Created by chm2web html help conversion utility. |