CAUSE: | In a VHDL Design File (.vhd) at the specified location, you made an assignment using a variable that was never assigned. |
ACTION: | Assign the variable to a known value, and then use the variable to assign to another variable. |
See also:
Sections 4.2.1.3 and 8.5 of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual
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