See Also

You can declare an enumeration type for the states of a state machine. Enumeration types—that is, types whose values are all user-defined—are ordered by enumeration value. In general, the Compiler automatically assigns the value 0 to the first state, the value 1 to the second state, the value 2 to the third state, and so on. In the example shown in Implementing State Machines, the Compiler assigns the value 0 to s0 and the value 1 to s1.

For more information, see "Section 3.1.1: Enumeration Types" in the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual.

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