/* @(#)allcells.ss  1.1 11/21/94 19:27:15 */

/*
** allcells.ss
**
** This script creates a new design containing one cell of each type
** in a given library. This is useful for testing new libraries.
*/

/* change this to whatever library you want */
thelib = "vlib"

read thelib + ".db"

/* create a new design */
remove_design allcells
create_design allcells

current_design = allcells

/* initialize the port names and instance names */
portnum = 0
unum = 0

/* find all the cells in the library */
foreach(cell, find(lib_cell, thelib + "/*")) {

    /* instance name */
    instance_name = U + unum
    unum = unum + 1

    /* create a cell in the current design */
    create_cell instance_name cell

    /* find all the pins on the library cell */
    foreach(thepin, find(lib_pin, cell + "/*")) {
        port_name = "p_" + portnum
        net_name = "net" + portnum
        portnum = portnum + 1

        pin_name = cell + "/" + thepin

        /* find the direction of the pin */
        dirlist = get_attribute(pin_name, pin_direction)

        /* convert the direction from a list to a value */
        if (dirlist == {in}) {
            direction = "in"
        } else if (dirlist == {out}) {
            direction = "out"
        } else {
            direction = "inout"
            }

        instance_pin = instance_name + "/" + thepin

        /* create a port in the current design */
        create_port port_name -dir direction

        /* and a net */
        create_net net_name

        /* now wire up the port and the pin */
        connect_net net_name { instance_pin port_name }
        }
    }

write
/* end of script allcells.ss */

exit