The Designer's Guide to VHDL

Peter J. Ashenden

DLX Support Material

The DLX processor is a RISC machine described by John Hennessy and David Patterson in their book Computer Architecture: A Quantitative Approach. They provide support software and other resources for the DLX as a supplement to the book.

Additional software for the DLX is available from the anonymous ftp server for the Department of Computer Science at The University of Adelaide:

• dlxasm.tar.Z - source archive for dlxasm - a DLX assembler (Here)
• dlxasm - binary for SunOS 4.1 (Here)
• dlxdist.tar.Z - source archive for xdlx - an X-windows based simulator (Here)
• xdlx - binary for SunOS 4.1 (Here)

This software is made available as is, with no warrantee or offer of support.

Some further DLX-related links of interest:

• SuperScalar DLX: (Here)
  A PPC603-style superscalar mixed behaviour/RTL model of the DLX processor from the TU Darmstadt, Germany:
  • superscalar, pipelined implementation of DLX (but without floating-point)
  • 4 separate functional untis: branch-resolve, arithmetic-logical, multiply-divide,
  • load-store
  • 5-entry reorder buffer, up to 5 active instructions
  • 4-entry branch-target-buffer
  • precise exceptions
  • small 64-entry I-cache and D-cache

  The link above contains documentation, all VHDL models, and some test programs in ZIP format. The VHDL code itself is nicely commented and very readable.