// General Register for D40 ( 4 bit Simple Microprocessor )
// Words Length : 4 bit
// Functionality : reset, load
// Date : 97/12/01 (Mon)
// Author : tootsuka@de.tokyo-ct.ac.jp

module gr4(clk,in,out,ctl) ;

input        clk ;      // system clock
input  [3:0] in ;       // input of general register
output [3:0] out ;      // output of general register
input  [1:0] ctl ;      // General control
                        // ctl = 00   : reset
                        //       01   : load
                        //       10   : hold
                        //       else : hold
reg    [3:0] a4 ;       // General Register

assign out = a4 ;

always @(posedge clk)
   begin
      a4 <= a4_mux(ctl) ;
   end

function [3:0] a4_mux ;
input [1:0] ctl ;
  begin
     case ( ctl )
        2'b00   : a4_mux = 4'b0000 ;          // reset
        2'b01   : a4_mux = in ;               // load
        2'b10   : a4_mux = a4 ;               // hold
        default : a4_mux = a4 ;               // hold
     endcase
  end
endfunction

endmodule