Major VLSI technology trends threaten the use
of this abstraction
- Due to their increasing resistance, wires are emerging
as a primary source of propagation delay in submicron VLSI.
- Since the wire delays depend on the final physical
layout, separating gate-level logical design from detailed
physical design is much harder.
- High-frequency clocks are also becoming more difficult to
distribute through the sluggish wiring.
- These problems make it extremely difficult to completely
automate the synthesis of large systems, and this is a
serious obstacle to adaptive computing.
