--
--                                     Copyright 1992
--                                     Your Company Name
--                                     All Rights Reserved
--
--   File name :  
--   Title     :  
--   Notes     :  
--   Author(s) :  
-- --------------------------------------------------------------------
--   MODIFICATION HISTORY :
-- --------------------------------------------------------------------
--   version no:| author:|  mod. date:| changes made:
--     V0.100   |        |            | Original Code
-- --------------------------------------------------------------------
library library_name;
use library_name.all;

Package Body name_of_package is

---------------------------------------------------------------
--  FUNCTION BODIES                                          --
---------------------------------------------------------------
--  function function_name ( parameters: types ) return
                             type is
       -- VARIABLE DECLARATIONS
--  begin
--  end function_name
--     These function elaborations are declared in the package
--     header. You are free to use these functions as you wish.

    function to_logic(int,length:integer) return std_logic_vector is
          variable digit: integer :=2**(length-1);
          variable local: integer;
          variable result: std_logic_vector (length-1 downto 0);
      begin
          local := int;
          if ( int >= 0 ) then                    -- Pos number
              for i in result'RANGE loop
                  if local/digit >= 1 then
                      result(i) := '1';
                      local := local-digit;
                    else
                      result(i) := '0';
                  end if;
                  digit := digit/2;
              end loop;
              return result;
            else                                  -- Neg number
              local := -int;
              local := local-1;
              for i in result'RANGE loop
                  if local/digit >= 1 then
                      result(i) := '1';
                      local := local-digit;
                    else
                      result(i) := '0';
                  end if;
                  digit := digit/2;
              end loop;
              result := NOT result;
              return result;
          end if;
    end to_logic;

    function to_integer (bits:std_logic) return integer is
      begin
             if ( bits = '1' ) then
                 return 1;
               else
                 return 0;
             end if;
    end to_integer;

    function to_integer (bits:std_logic_vector) return integer is
           variable result:integer:=0;
      begin
             if ( bits(bits'HIGH) = '1' ) then    -- Negative number
                 for i in bits'RANGE LOOP
                   result := result*2;
                   if ( bits(i) = '0' ) then 
                       result := result+1;
                   end if;
                 end LOOP;
                 result := -(result+1);
               else                               -- Positive number
                 for i in bits'RANGE LOOP
                   result := result*2;
                   if ( bits(i) = '1' ) then
                       result := result+1;
                   end if;
                 end LOOP;
             end if;
             return result;
    end to_integer;

    function to_int (bits:std_logic_vector) return integer is
           variable result:integer:=0;
      begin
             for i in bits'RANGE LOOP
               result := result*2;
               if ( bits(i) = '1' ) then
                   result := result+1;
               end if;
             end LOOP;
             return result;
    end to_int;

    function sign_extend (bits:std_logic_vector) return
                           std_logic_vector is
           variable result:std_logic_vector(15 downto 0);
      begin
             for i in bits'RANGE LOOP
               result(i) := bits(i);
             end LOOP;
             if ( bits(bits'HIGH) = '1' ) then    -- Negative number
                 for i in bits'HIGH to 15 LOOP
                   result(i)    := '1';
                 end LOOP;
               else                               -- Positive number
                 for i in bits'HIGH to 15 LOOP
                   result(i)    := '0';
                 end LOOP;
             end if;
             return result;
    end sign_extend;

    function inc_reg(bits:std_logic_vector; stop:boolean) return
                       std_logic_vector is
        variable    storage:std_logic_vector(bits'HIGH downto 0);
      begin
             if ( NOT stop ) then
                 storage    := to_logic(to_integer(bits) + 1, 16 );
               else
                 storage    := bits;
             end if;
             return storage;
    end inc_reg;

    function dec_reg(bits:std_logic_vector; stop:boolean) return
                       std_logic_vector is
        variable    storage:std_logic_vector(bits'HIGH downto 0);
      begin
             if ( NOT stop ) then
                 storage    := to_logic(to_integer(bits) - 1, 16 );
               else
                 storage    := bits;
             end if;
             return storage;
    end dec_reg;


---------------------------------------------------------------
--  PROCEDURE BODIES                                         --
---------------------------------------------------------------
--  procedure procedure_name ( parameters : types modes ) is
     -- VARIABLE DECLARATIONS
--  begin
--  end procedure_name


end function_name;