Doulos VHDL Model and Verilog Model Library

Strictly speaking, Model of the Month is something of a misnomer as recent changes to our website mean we are no longer updating the Model Library on a monthly basis. However, we have decided to stick with the name as it’s more eloquent than Model of the Quarter! Just bear in mind that for every Model of the Month, there are two months without one.

This Month...

BIST Circuits, Part Two

Here is the archive for all the models that have appeared on our Model of the Month page.
All models are written in VHDL unless otherwise stated.

Generic RAM Model
Analog-to-Digital Converter
Finite Impulse Response (FIR) Filter
Analog-to-Digital Converter (Verilog)
Image Processing Cache Register Array (IPCRA)
Carry Look Ahead Blocks
Synchronizer Scaler
HeapSortParallel
Shift Register (Verilog)
Simple RAM Model (Verilog)
Simple RAM Model
Universal Asynchronous Receiver (Verilog)
Spectrum Spreader
Demultiplexer
6-port Register File
BIST Circuits, Part One
8-bit x 8-bit Pipelined Multiplier

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