LPM_MUX

4.2.7 LPM_MUX

Ports

Port Name Type Usage Description Comments

Data I Required Data input Vector, LPM_Size times LPM_Width wide

Result O Required Selected input vector Vector, LPM_Width wide

Sel I Required Selects one of the input vectors Vector, LPM_WidthS wide

Clock I Optional Clock for pipelined usage Note 1

Aclr I Optional Asynchronous Clear Note 2

Note 1: The clock port provides for pipelined operation of the LPM_MUX. If a latency other 0 (default value) is specified, then the clock port must be connected.

Note 2: The pipelined initializes to undefined. The Aclr port may be used at any time to reset the pipeline to all 0's asynchronously to clock.

Properties

Property Usage Value Comments

LPM_Width Required LPM Value > 0 Width of output vector. Number of Multiplexers.

LPM_Size Required LPM Value > 0 Number of inputs to each Multiplexer. Number of input buses.

LPM_WidthS Required LPM Value > 0 WidthS should be the next integer greater than or equal to log₂(LPM_Size) or there will be unselectable input vectors.

LPM_Pipeline Optional LPM Value > = 0 Default is 0 - non-pipelined

Functions

Sel vector Sel Value Result

0000...000 0 Data_{0_[LPM_Width-1:0]}

0000...001 1 Data_{1_[LPM_Width-1:0]}

0000...010 2 Data_{2_[LPM_Width-1:0]}

... ... ...

1111...110 LPM_Size-2 Data_{LPM_Size-2_[LPM_Width-1:0]}

1111...111 LPM_Size-1 Data_{LPM_Size-1_[LPM_Width-1:0]}

This table assumes that LPM_Size is a power of two, but that is not required. If there is no Data vector that corresponds to the 'Sel Value'; that is, if Data_{Sel_Value} is not connected or is greater than LPM_Size, the selection of 'Sel Value' will produce an undefined Result.

Example

Suppose the designers have three 8-bit buses and they want to select one of the three buses. This is done using an LPM_MUX with an LPM_Width of 8 and an LPM_Size of three. The LPM_Width of eight indicates that there are eight multiplexers, and the LPM_Size of three indicates that each multiplexer has three inputs.

This diagram is for illustrative purposes only and is not intended to specify any implementation details.

Supposing that bus A becomes Data2_Xi, bus B becomes Data1_Xi, and bus C becomes Data0_Xi, the function performed by the LPM_MUX gate in this case is:

Out[0] = Result0 = DataSelX0 = (UNDEFINED if Sel = 3, A[0] if Sel = 2, B[0] if Sel = 1, C[0] if Sel = 0 )

Out[1] = Result1 = DataSelX1 = (UNDEFINED if Sel = 3, A[1] if Sel = 2, B[1] if Sel = 1, C[1] if Sel = 0 )

Out[2] = Result2 = DataSelX2 = (UNDEFINED if Sel = 3, A[2] if Sel = 2, B[2] if Sel = 1, C[2] if Sel = 0 )

Out[3] = Result3 = DataSelX3 = (UNDEFINED if Sel = 3, A[3] if Sel = 2, B[3] if Sel = 1, C[3] if Sel = 0 )

Out[4] = Result4 = DataSelX4 = (UNDEFINED if Sel = 3, A[4] if Sel = 2, B[4] if Sel = 1, C[4] if Sel = 0 )

Out[5] = Result5 = DataSelX5 = (UNDEFINED if Sel = 3, A[5] if Sel = 2, B[5] if Sel = 1, C[5] if Sel = 0 )

Out[6] = Result6 = DataSelX6 = (UNDEFINED if Sel = 3, A[6] if Sel = 2, B[6] if Sel = 1, C[6] if Sel = 0 )

Port Name	Type	Usage	Description	Comments
Data	I	Required	Data input	Vector, LPM_Size times LPM_Width wide
Result	O	Required	Selected input vector	Vector, LPM_Width wide
Sel	I	Required	Selects one of the input vectors	Vector, LPM_WidthS wide
Clock	I	Optional	Clock for pipelined usage	Note 1
Aclr	I	Optional	Asynchronous Clear	Note 2

Property	Usage	Value	Comments
LPM_Width	Required	LPM Value > 0	Width of output vector. Number of Multiplexers.
LPM_Size	Required	LPM Value > 0	Number of inputs to each Multiplexer. Number of input buses.
LPM_WidthS	Required	LPM Value > 0	WidthS should be the next integer greater than or equal to log₂(LPM_Size) or there will be unselectable input vectors.
LPM_Pipeline	Optional	LPM Value > = 0	Default is 0 - non-pipelined

Sel vector	Sel Value	Result
0000...000	0	Data_{0_[LPM_Width-1:0]}
0000...001	1	Data_{1_[LPM_Width-1:0]}
0000...010	2	Data_{2_[LPM_Width-1:0]}
...	...	...
1111...110	LPM_Size-2	Data_{LPM_Size-2_[LPM_Width-1:0]}
1111...111	LPM_Size-1	Data_{LPM_Size-1_[LPM_Width-1:0]}