Technology Scaling


The purpose of this lab is review the effects of technology scaling. This tar archive contains the following files:

You should review these files and refresh your HSPICE understanding. In the technology files, be sure to note what values are used for lambda in order to compute the scaling factors.

The Task

First, run HPSICE using the provided spice files to characterize a 1X inverter with a 4X load for DC switching point, TPLH/TPHL, and power (both no load dynamic capacitance and loaded dynamic capacitance). For the complex gate presented on page 9 of the 'Review of VLSI Principles' notes, do the following (all simulations will use a Vdd of 3.3V).

  1. Characterize the DC switching point of 'C' input. Set the transistor widths such that the DC switching point is between 40% and 60% of Vdd for all three technologies (Agilent, HP, Leda).
  2. Characterize the delay C2F(TPLH) and C2F(TPHL) for all three technologies. Compare the measured delay scaling to the expected delay scaling for fixed-voltage scaling.
  3. Characterize the unloaded dynamic capacitance for all three technologies (make all 3 inputs switch simultaneously to measure worst case). Compare the measured capacitance scaling to the expected capacitance scaling for fixed-voltage scaling.
  4. Characterize the loaded dynamic capacitance (load = 4x inverter) for all three technologies (make all 3 inputs switch simultaneously to measure worst case). Compare the measured capacitance scaling to the expected capacitance scaling for fixed-voltage scaling.
  5. Normalize your delay and power values to the values measured for the 1X inverter for each technology. How does the normalized value change with technologies?
  6. For the Leda 0.25U technology ONLY and with a Voltage = 2.5V, measure/compute the parasitic p delay (no-load) and 'tau' technology values mentioned in the notes on estimating delay via 'Logical Effort'. Then measure a 1X inverter driving a 4X load, and a 1X Nand2 driving a 4X Nand2 load. Compare the measured delay against predicted delay via the 'Logical Effort' method. Note: You will have to average TPLH, TPHL values together in both cases to get an average delay since the model does not distinguish between rise/fall delays. Comment on the results. WARNING!!!! In measuring the no-load delay, DO NOT use an inverter to drive the gate to give a realistic waveform. The no-load delay assumes a constant input-drive ability, so you need to use a voltage source with a ramp input (use 100ps rise/fall times). For all delay measurements in this section, use a voltage source driving the input. Also, do not use any GEO parameters so that a worst case source/drain diffusion capacitance is assumed.

    Other hints: To get the 'p', 'tau' values for the 'Logical Effort' method, use the procedure described in the notes for measuring Pinv, and tau. To get Pnand2, find the ratio of the noload delay of a Nand2 to the Noload inverter delay, and use this ratio to compute Pnand2 from Pinv. DO NOT BE SURPRISED if Pinv is significantly different from '1.0'. You can now use Tau, Pinv, Pnand2 to compute delays and compare these against measured delays for a 1X inverter driving a 1X inverter load, a 4X inverter load; and a 1X Nand2 driving a 1X Nand2 load, a 4X nand2 load.

    When driving your Nand2 gates, use the worst-case delay input and tie the other input to Vdd. When characterizing any multi-input gate, you only drive one input and tie the other inputs to values that will sensitize the gate to the driven input.

Note: the value of 3.3V is too high for the Leda 0.25U process, but we are using it here to investigate fixed-voltage scaleing. For future simulations using the Leda 0.25U process, a value of 2.5V will be used.

Submission

Use this perl script to submit your file from a UNIX machine (right click and save this script to your local directory). Create a directory called 'sim2', and place your results in this directory (in the form of text file or PDF or Microsoft.doc file). Execute the script by doing "perl script_name" from the directory above the 'sim2' directory. The script will tar archive the sim1 directory, and email both me and you a copy of the tar archive. If you have a problem with the script, let me know.

You MUST have a report that summarizes your results. The file should be called 'report.pdf' and be inside of your 'sim2' directory. You may include whatever other files you wish. DO NOT INCLUDE *.tr files from HSpice runs, these are very large. Please include any spice source files that you have written.