Delay Modelling

In verilog there are three different methods of delay modelling:

• Distributed Delay: Delay assigned to each gate in a module.
• Lumped Delay: Delay assigned as a single delay in each module.
• Pin - to - Pin Delay: Delay assigned to paths from each input to each output.

Under the above links there will be an introduction and explanation of each form of delay modelling, as well as a circuit example and a module example for each.