Performance affected by scheduled events being cancelled

Performance will suffer if events are scheduled far into the future but then cancelled before they take effect. This situation will act like a memory leak and slow down simulation.

In VHDL this situation can occur several ways. The most common are waits with time-out clauses and projected wave forms in signal assignments.

The following code shows a wait with a time-out:

signals synch : bit := '0';
...
p: process
begin
	wait for 10 ms until synch = 1;
end process;

synch <= not synch after 10 ns; 

At time 0 p makes an event for time 10ms. When synch goes to 1 at 10 ns, the event at 10 ms is marked as cancelled but not deleted, and a new event is scheduled at 10ms + 10ns. The cancelled events are not reclaimed until time 10ms is reached and the cancelled event is processed. As a result there will be 500000 (10ms/20ns) cancelled but undeleted events. Once 10ms is reached memory will no longer increase because we will be reclaiming events as fast as we add them.

For projected wave forms the following would behave the same way:

signals synch : bit := '0';
...
p: process(synch)
begin
   output <= '0', '1' after 10ms;
end process;

synch <= not synch after 10 ns; 

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