/*
  Writer : forestair@paran.com  : DigiClub

  Xilinx Spartan BIT map file DownLoader

  Spartan Series Data Stream Formats
----------------------------------------------------------
  Fill Byte            11111111b
  Preamble Code        0010b
  Length Count         COUNT(23:0)      Once Per Bitstream
  Fill Bits            1111b
        -----------------------------------
  Start Field          0b
  DataFrame            Data(n-1:0)
  CRC or Constant      xxxx(CRC)        Once Per DataFrame
  Field Check          or 0110b
  ExtendedWriteCycle   -
        -----------------------------------
  Preamble             01111111b        Once Per Device
        -----------------------------------
  Start-Up Bytes       xxh              Once Per BitStream
----------------------------------------------------------

  BitsPerFrame   = (10 x Number of ROWs) + 7 for the Top
     + 13 for the bottom + 1 + 1 start bit + 4 error check bits
  NumbersOfFrame = (36 x NumOfCol) + 26 for the left edge + 41 for the right edge + 1
  ProgramData    = (Bits per Frame x NumberOfFrames) + 8 postamble bits
  PROM Size      = ProgramData + 40(Header) + 8

  ex)xcs20
  40(Header)    => 8(11111111b)+4(0010b)+24(count)+4(1111b)
  226(BPF)      => (10x20(row))+7(top)+13(bottom)+1+1(start)+4(errorcheck)
  788(NOF)      => (36x20(col))+26(left)+41(right)+1
  178096(PData) => 226(BPF)+788(NOF)+8(postamble)
  178144PROM    => 178096(PData)+40(Header)+8
       22268byte
  Created File Size 22337Byte - 22268 = 69bytes[Skip This Data]
----------------------------------------------------------
  PART      ROWCOL BitPerFrame Frames ProgramData   PROM Size[bit]
  XCS05  -   10x10    126       428   53936[6742]     53984[6748]
  XCS10      14x14    166       572   94960[11870]    95008[11876]
  XCS20      20x20    226       788  178096[22262]   178144[22268]
  XCS30      24x24    266       932  247920[30990]   247968[30996]
  XCS40      28x28    306      1076  329264[41158]   329312[41164]
*/

 

#include <io.h>
#include <dos.h>
#include <stdio.h>
#include <fcntl.h>
#include <stdlib.h>
#include <alloc.h>
#include "sam940x.h"

#define DLport 0x03
#define TRUE    1
#define FALSE   0

 

struct XCS20HDR{
   unsigned char sizeH;
   unsigned char sizeL;
}hdr;

struct FPGA{
   int din    : 1;  // out     /din   outport  GPIO0
   int cclk   : 1;  // out     /cclk  outport  GPIO1
   int done   : 1;  // cut     /prog  outport  GPIO2
   int prog   : 1;  // out     /done  inport   GPIO3
   int conf4  : 1;  // o=0:conf,1:norm
   int conf5  : 1;  // o=0:conf,1:norm
   int idone  : 1;  // in
   int iinit  : 1;  // i=prog
}s_fpga;

union{
   int    signal;
   struct FPGA chip;
}fpga;

 

void tjoutp(WORD offset, OCTET value);
OCTET tjinp(WORD offset);

int download_FPGA(const char *filename)
{
   int  handle;
   int  count,bit_pos;
   unsigned int  filesize;
   unsigned int i;
   long  bytes;
   char *buf,byte,tmp;
//   int isheader=TRUE;
   unsigned int  len;
   unsigned char sizeH,sizeL;

 

   if ((handle = open(filename, O_RDONLY | O_BINARY)) == -1)
   {
   perror("\t\tError:");
   printf("\n");
   return 1;
   }

   filesize = filelength(handle); printf("\n\t FILE Size => %8d",filesize);

   buf = malloc(filesize);   // 0x4000=32768Bytes

/* Header Processing */
   //while(isheader)
   {
  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  //if(len == 0){ isheader = FALSE };
  read(handle, buf, len);

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  read(handle, buf, len);     // "a"

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  read(handle, buf, len);     // "filename"
  for(i=0; i<len; i++){printf("%c",buf[i]);}; printf("\n");
  read(handle, buf, 1);     // "b"

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  read(handle, buf, len);     // "Device"
  for(i=0; i<len; i++){printf("%c",buf[i]);}; printf("\n");
  read(handle, buf, 1);     // "c"

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  read(handle, buf, len);     // "date"
  for(i=0; i<len; i++){printf("%c",buf[i]);}; printf("\n");
  read(handle, buf, 1);     // "d"

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  read(handle, buf, len);     // "time"
  for(i=0; i<len; i++){printf("%c",buf[i]);}; printf("\n");
  read(handle, buf, 1);     // "e"

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;  // meybe 0

  read(handle, &sizeH, 1);  read(handle, &sizeL, 1);
  len = ((unsigned int)sizeH<<8) + sizeL;
  printf("\n\tPROM Size => %6d",len);
   }

 

   if ((bytes = read(handle, buf, filesize)) == -1) {
   printf("\tRead Failed.\n");
      free(buf);
   exit(1);
   }
   else {
   count = bytes;
   printf("\tRead: %d bytes read.\n", bytes);
   }

   i = 0;

// Initialize TigerJet AUX port
//
//
//
//
//
//
   tjoutp(0, 0x00); // PIB 3cycle                        xx00 xxx0
   tjoutp(2, 0x3F); // set IO direction                  0011 1111
   tjoutp(3, 0x0F); // AUX data for Output
   tjoutp(5, 0x00); // Interrupt Mask                    0000 0000
//   tjoutp(0x29, 0x00); // APC mask register              0000 0000
//   tjoutp(0x2A, 0x00); // AUX pin polarity control       0000 0000
//   tjoutp(0x2B, 0x00); // bit0 =>0:Reg03  =>1:Config0x44 xxxx xxx0

 

   fpga.chip.din   = 1;
   fpga.chip.cclk  = 1;
   fpga.chip.done  = 0; //cut
   fpga.chip.prog  = 0;
   fpga.chip.conf4 = 0;
   fpga.chip.conf5 = 0;
   fpga.chip.idone = 1;
   fpga.chip.iinit = 1;
   tjoutp(DLport, fpga.signal);
   delay(3000);

   fpga.chip.prog = 1;
   fpga.chip.done = 0;           // Start
   tjoutp(DLport, fpga.signal);
   delay(3);

 

   fpga.chip.din  = 1;
   fpga.chip.cclk = 1;
   fpga.chip.done = 1;
   tjoutp(DLport, fpga.signal);

   while(count--){
   byte = buf[i++];
   bit_pos = 0;
   do{
   fpga.chip.cclk = 0;
   // tmp = byte<<bit_pos; printf("%02x ",tmp); //debug
   if((byte<<bit_pos) & 0x80){
   fpga.chip.din = 1;  // printf("1");  // debug
   }else{
   fpga.chip.din = 0;  // printf("0");  // debug
   }
   tjoutp(DLport, fpga.signal);

   fpga.chip.cclk = 1;          // Latched by FPGA
   tjoutp(DLport, fpga.signal);
   }while(bit_pos++ < 7);
//   delay(1);
   tjinp(DLport);
   //getch();   printf(" ");  // debug
   }

//  for(i=0;i<20; i++)
//  {
//    fpga.chip.clk = 0;
//    fpga.chip.clk = 1;
//  }

   i=0;
   do{
   tmp=tjinp(0x07);  // 07
   }while(!(tmp&0x08) && (i++<1000));  // if(fpga..chip.done == HIGH) Finished
   if(i>=1000) printf("\n DONE timeout");

   free(buf);
   close(handle);

   fpga.chip.din   = 1;
   fpga.chip.cclk  = 1;
   fpga.chip.done  = 0;
   fpga.chip.prog  = 1;
   fpga.chip.conf4 = 1;
   fpga.chip.conf5 = 1;
   fpga.chip.idone = 1;
   fpga.chip.iinit = 1;
   tjoutp((WORD)DLport, fpga.signal);

   tjoutp(TJ_AUX02, 0x3F); // set AUX data port direction IN
   return 0;
}

 

//void main(void)
//{
//   char *filename = "awd.bit";
//
//
//   download_FPGA(filename);
//}