The book is organized into chapters which are roughly in the same order as the tasks and decisions which are performed during an FPGA-based prototyping project.
Readers will be approaching this book from a number of directions. Some will be experienced with many of the tasks involved in FPGA-based prototyping but are looking for new insights and ideas; others will be relatively new to the subject but experienced in other verification methodologies; still others may be project leaders who need to understand if the benefits of FPGA-based prototyping apply to their next SoC project. So, depending on your starting point you may need to start reading the book in a different place. In anticipation of this, we have tried to make each subject chapter relatively standalone, or where necessary, make numerous forward and backward references between subjects, and provide recaps of certain key subjects
Chapters 1&2: We start by analyzing the complexity of the problem of validating an SoC and the software embedded within it. We introduce a number of different prototyping methods, not just FPGA. We then go on to describe the benefits of FPGA-based prototyping in general terms and give some real-life examples of successful projects from some leading prototypers in the industry.
Chapter 3: This is a primer on FPGA technology and the tools involved, giving a new perspective on both in the context of FPGA-based prototyping. Experienced FPGA users may feel that they can skip this chapter but it is still recommended as a way to look at FPGAs from possibly a new viewpoint.
Chapter 4: Every journey begins with a single step. After hopefully whetting the reader’s appetite for FPGA-based prototyping, this chapter brings together sufficient information to get us started, allowing us to gauge the effort, tools and time needed to create a prototype.
Chapters 5 and 6: The hardware component of a prototype should be chosen early in the project. These chapters give guidance on how to best create a platform in house, or how to choose between the many commercial platforms and how to make an informed comparison between them (see also Appendix B)
Chapter 7, 8, 9 and 10: Key information on manipulating a design to make it ready for implementation in FPGA hardware, with special focus on RTL changes, partitioning and IP handling. There is also guidance on how a Design-for-Prototype SoC design style can be adopted to make designs more suitable for FPGA-based prototyping team.
Chapters 11&12: The board is ready; the design is ready; what happens when the two are put together? These chapters cover how to bring up the prototype in the lab and then go on to debug the RTL and software on the system and make fast iterations of the design. There is also a discussion of the deployment of the prototype outside the lab.
Chapter 13: We have a working FPGA-based prototype; what else can be done with such a useful platform? This chapter shows the benefit of tailoring the prototype to be used within wider verification environments including RTL simulators and SystemC™-based virtual models.
Chapter 14: Here we perform some future-gazing on FPGA-based prototyping and beyond into a hybrid prototyping, taking concepts from chapter 13 and other places to some new conclusions.
Chapter 15: This then leads into some conclusions and re-iteration of key rules and suggestions made throughout the manual.
Appendix A: Here is an instructive worked example of a recent FPGA-based prototype project performed at Texas Instruments giving details of the various steps taken and challenges overcome.
Appendix B: There is also an economic and business comparison between making prototype hardware in-house ‘v’ obtaining them commercially.
NOTE: the majority of the FPMM contents are intended to be generic and universally applicable, however, where examples are given, we hope that readers will forgive us for using tool and platforms best known to us at Synopsys® and Xilinx® (i.e., our own).