Quartus

Input pin <name>, which feeds fbin port of enhanced PLL <name>, and output pin <name>, which will be compensated by PLL <name>, have different I/O standards <name> and <name>

CAUSE: You assigned the specified I/O standards to the specified input and output pins. However, the I/O standards of the input and output pins do not match. The output pin, which will be compensated by the specified enhanced PLL, must have the same I/O standard as the input pin, which feeds the fbin port of the PLL.
ACTION: Change the I/O standard assignments of the specified input and output pins so they match.

See also:

Overview: Making Assignments

- PLDWorld -

 
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