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A VHDL attribute that directs the Logic Synthesizer to duplicate a register to ensure that the register's fan-out does not exceed the maximum value you specify. You can use this option to reduce the load of critical signals in the design, thereby improving performance.

You can use this attribute only in designs that target APEX^™ 20K, APEX^™ II, ARM^®-based Excalibur^™, Cyclone^™, Stratix^™, or Stratix^™ GX devices.

Use an Attribute Declaration and Attribute Specifications to use the maxfan attribute in a design. You must associate the maxfan attribute only to registers, and you must specify the maximum value of fan-out an associated register can have. For example, in the following code, the Attribute Declaration declares the maxfan attribute, and the Attribute Specification associates the maxfan attribute to the clkgen register and specifies that the register have a maximum of 200 fan-outs:

SIGNAL clk_gen : STDLOGIC;

ATTRIBUTE maxfan : INTEGER ;
ATTRIBUTE maxfan OF clk_gen : INTEGER IS 200;

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