See Also

A VHDL attribute that specifies that the Logic Synthesizer does not minimize or remove a particular register. You can use this attribute to preserve a register so you can observe the register during simulation or with the SignaTap II Logic Analyzer.

You cannot use this attribute for registers that have no fan-out.

Use an Attribute Declaration and Attribute Specifications to use the preserve attribute in a design. You must associate the preserve attribute only to registers, and you must specify the attribute value as true. For example, in the following code, the Attribute Declaration declares the preserve attribute, and the Attribute Specification associates the preserve attribute to the reg1 register:

signal reg1: stdlogic;

attribute preserve: boolean;
attribute preserve of reg1: signal is true;

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