SUAVE
SAVANT and University of Adelaide VHDL Extensions
Background
VHDL is an IEEE-standard hardware description language used in the design of digital electronic 
systems.  Designers use the 
language to develop models of systems, to verify their correctness using simulation, and to 
refine them using synthesis. 
As integrated circuit complexity extends into the millions of gates, designers must increasingly 
rely on use of hardware 
description languages for high-level design early in the design flow.  High-level design involves 
description of the system at a 
high-level of abstraction, ignoring lower-level details of implementation.  At the high level, the 
designer makes decisions about 
the algorithms to be used and explores alternative architectures for implementing the algorithms. 
VHDL originated in the early 1980s, and provides very good facilities for modelling at the gate 
and register-transfer levels of 
abstraction.  Its facilities for high-level modelling, however, are less than satisfactory.  The 
SUAVE project, a collaborative 
project between Dr. Peter Ashenden at the University of Adelaide and Dr. Philip Wilsey at the 
University of Cincinnati, has 
extended VHDL to improve its support for high-level modelling.  Extensions include 
object-oriented features for improved data modelling, type generics for improved reuse of model 
components, and message-passing communication via channels for 
improved system-level modelling.  These extensions are currently being implemented in 
experimental tools for design analysis 
and simulation.  The extensions have also been presented to the IEEE as a candidate for 
standardisation. 
Work is in progress to implement the SAUVE extensions, and a SUAVE analyzer (version 
0.9.02) is available.  The analyzer is built on top of the SAVANT software and is limited by 
the license restrictions of that software. 
For more information about the SUAVE project, see a more detailed project description, or 
contact Peter Ashenden. 
SUAVE Tutorial (updated 17 March 1999)
A tutorial presentation is available in the following formats: 
The source code examples from the tutorial are also available: 
Publications
- P. J. Ashenden, Robert Esser and P. A. Wilsey, "Communication and Synchronization Using 
Bounded Channels in SUAVE," Proceedings of International Hardware Description Languages 
Conference, HDLCON '99, Santa Clara, California (April 1999), to appear. [Postscript, 
PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, "Protected Shared Variables in VHDL: IEEE Std 1076a," 
IEEE Design and Test of Computers (1999), to appear.  [Postscript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, "Principles for Extensions to VHDL for High-Level 
Modeling," VLSI Design (1999), to appear. [Postscript, PDF] 
  
 - P. J. Ashenden, P. A. Wilsey and D. E. Martin, "SUAVE: Object-Oriented and Genericity 
Extensions to VHDL for High-Level Modeling," Proceedings of Forum on Design Languages 
(FDL '98), Vol. 1, Lausanne, Switzerland (September 1998), pp. 109-118. [Postscript, 
PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, "Extensions to VHDL for Abstraction of Concurrency and 
Communication," Proceedings of Sixth International Symposium on Modeling, Analysis and 
Simulation of Computer and Telecommunication Systems (MASCOTS '98), Montreal, Canada 
(July 1998) pp. 301-308. [Postscript, PDF] 
  
 - P. J. Ashenden, P. A. Wilsey and D. E. Martin, "SUAVE: Extending VHDL to Improve 
Modeling Support," IEEE Design and Test of Computers (April-June 1998), pp. 34-44. 
[Postscript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, Proposed Extensions to VHDL for Abstraction of 
Concurrency and Communication, Joint Technical Report, TR-97-11, Dept. Computer 
Science, University of Adelaide, South Australia, and TR-210/12/97/ECECS, Department of 
Electrical and Computer Engineering and Computer Science, University of Cincinnati 
(December 1997).  [PostScript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, "Considerations on System-Level Behavioural and 
Structural Modeling Extensions to VHDL," Proceedings of VHDL International Users Forum 
Spring-98 Conference, Santa Clara, California (March 1998), pp. 42-50 (winner of Best 
Paper prize). [Postscript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, "A Comparison of Alternative Extensions for Data 
Modeling in VHDL," Proceedings of Hawai'i International Conference On System Sciences, 
Kona, Hawaii (January 1998). [Paper: Postscript, PDF. Slides: Postscript, PDF.] 
 
- P. J. Ashenden and P. A. Wilsey and Dale E. Martin, "SUAVE: Painless Extension for an 
Object-Oriented VHDL," Proceedings of VHDL International Users Forum Fall-97 Conference, 
Arlington, VA (October 1997), pp. 60-67.  [Paper: PostScript, PDF. Slides: Postscript, 
PDF.] 
  
 - P. J. Ashenden and P. A. Wilsey and Dale E. Martin, "Reuse Through Genericity in 
SUAVE," Proceedings of VHDL International Users Forum Fall-97 Conference, Arlington, VA 
(October 1997), pp. 170-177.  [Paper: PostScript, PDF. Slides: Postscript, PDF.] 
  
 - P. J. Ashenden, P. A. Wilsey and D. E. Martin, SUAVE: A Proposal for Extensions to 
VHDL for High-Level Modeling, Joint Technical Report, TR-97-07, Dept. Computer Science, 
University of Adelaide, South Australia, and TR-207/08/97/ECECS, Department of 
Electrical and Computer Engineering and Computer Science, University of Cincinnati (August 
1997).  [PostScript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, Principles for Language Extension to VHDL to Support 
High-Level Modeling, Joint Technical Report TR-03/97, Dept. Computer Science, University 
of Adelaide, South Australia, and TR-204/05/97/ECECS, Department of Electrical and 
Computer Engineering and Computer Science, University of Cincinnati (May 1997).  
[PostScript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, A Comparison of Alternative Extensions for Data 
Modeling in VHDL, Joint Technical Report TR-02/97, Dept. Computer Science, University of 
Adelaide, South Australia, and TR-203/05/97/ECECS, Department of Electrical and 
Computer Engineering and Computer Science, University of Cincinnati (May 1997).  
[PostScript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, "Considerations on Object-Oriented Extensions to 
VHDL," Proceedings of VHDL International Users Forum Spring-97 Conference, Santa Clara, 
California (April 1997), pp. 109-118.  [Paper: PostScript, PDF. Slides: PostScript, PDF.] 
 
Publications in Preparation
Workshop Presentations
- P. J. Ashenden and P. A. Wilsey, "Extensions to VHDL for Abstraction of Concurrency and 
Communication",Proceedings of Forum on Design Languages (FDL '98), Vol. 2, Lausanne, 
Switzerland (September 1998), pp. 121-136. 
  
 - P. J. Ashenden, Abstraction of Communication and Concurrency in VHDL, CERC/VIUF/IEEE 
Computer Society Workshop on 21st Century Electronic Systems Design: Breakthroughs in 
Quality and Productivity, Dayton, Ohio, December 1997.  [Postscript, PDF] 
  
 - P. J. Ashenden and P. A. Wilsey, Abstraction of Concurrency and Communication in VHDL, 
Third Workshop on System Level Design Languages, Barga, Italy, July 1997 [Abstract: 
Postscript, PDF. Slides: Postscript, PDF.] 
  
 - P. J. Ashenden,  P. A. Wilsey and D. E. Martin, SUAVE: Extending VHDL to Improve 
Modeling Support, Second Workshop on the Future of VHDL, Paris, France, July 1997 
[Abstract: Postscript, PDF. Slides: Postscript, PDF.] 
  
 - P. J. Ashenden and P. A. Wilsey, SUAVE: Extending VHDL to Improve Modeling Support, 
IEEE DASC OO-VHDL Study Group, Anaheim, California, June 1997.  [PostScript, PDF] 
 
Panel Presentations
- P. J. Ashenden, Panel on OOVHDL, VHDL International Users Forum Fall-97 Conference, 
Washington, DC (October 1997).  [Slides: Postscript, PDF.] 
  
 - P. J. Ashenden, Panel on Systems Level Design and VHDL, VHDL International Users Forum 
Fall-97 Conference, Washington, DC (October 1997).  [Slides: Postscript, PDF.] 
 
Seminars
- P. J. Ashenden and P. A. Wilsey, SUAVE: Extending VHDL for High-Level System 
Modeling, presented at University of Missouri-Rolla (April 1997).  [Postscript, PDF] 
 
Other Documents
- Revised Summary of Syntax Changes: corrections to summary of changes to VHDL '93 
syntax changes listed in the Technical Report SUAVE: A Proposal for Extensions to VHDL 
for High-Level Modeling.  [Postscript, PDF] 
 
PDF documents can be viewed with Adobe Acrobat Reader. 
 
Peter Ashenden 
petera@ececs.uc.edu