Doulos VHDL Training, Advanced VHDL for Synthesis

Advanced VHDL for Synthesis is a 3 day advanced course aimed at ASIC engineers requiring a detailed working knowledge of the practical use of synthesis tools in an industrial design environment. The course assumes a basic knowledge of VHDL, and builds upon this to give the engineer an advanced understanding of the effective use of the VHDL language with synthesis technology.

What the course will give you An understanding of the capabilities and limitations of synthesis technology An appreciation of the issues concerning the practical use of synthesis tools An in depth knowledge of how best to write VHDL for effective synthesis Practical hands-on experience using leading synthesis tools

Application topics

• Introduction
• VHDL for synthesis
• Advanced VHDL style
• Understanding and using synthesis technology
• Using synthesis with simulation and test

Workshops

• Tools
  • Hands on experience using two or more leading VHDL synthesis tools and one or more VHDL simulators.
  • Step-by-step instructions show you how to drive the advanced features of the latest synthesis tools with the minimum of fuss, and you are free to experiment on your own.

• VHDL
  • The VHDL workshops teach you specific points about synthesizability.
  • Practise achieving high productivity whilst writing synthesizable VHDL, and make your first mistakes in a controlled environment!

Comprehensive VHDL for FPGA/ASIC
Comprehensive VHDL for Systems

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This page was last updated 14^th February 1996.

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