VHDL-AMS start

Analog modeling with VHDL and VHDL-AMS essentials
prepared by P. Bakowski

Introduction
The modeling of analog systems with VHDL is possible but limited by the inherent discrete-event simulation mode.
The application of discrete-event modeling mode to analog systems requires two consecutive transformations:

the mapping of analog continuous-time systems into analog discrete-time systems based on data-sampling techniques
the mapping of analog discrete-time systems into VHDL syntax and semantics.

This solution works well for relatively simple models. Main aspects of this kind of modeling and few examples of VHDL code used to model analog circuits are given in the first part of our presentation.
Complex analog models possibly composed from several entities require more powerful modeling environment provided by VHDL-AMS (IEEE 1076.1).
This analog extension to VHDL called VHDL-AMS is discussed briefly in the second part of this presentation. Much more complete presentation of VHDL-AMS is elaborated by Ken Bakalar, Ernst Christen and Alain Vachoux in the form of VHDL-AMS Tutorial.

Content: analog models in VHDL, VHDL-AMS: quantities, simultaneous statements, structural descriptions, procedural statements, simulation time and cycle, digital-to-analog and analog-to-digital events, break statement, bouncing ball

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Analog simulation basics

This short tutorial describes the basic techniques used for analog circuit simulation in both the temporal and the frequential domains.

VHDL and analog systems

VHDL simulation model is based on a discrete-event simulation cycle. Modeling of analog systems with discrete-event simulation mode requires the translation of continuous-time systems into data-sampled systems. This translation is an approximation of the continuous waveforms by a finite set of samples. If the analog waveform is frequency bandwidth limited, then the sampling inaccuracy can be eliminated provided the Nyquist Criterion is satisfied. The narrower is the bandwidth the smaller is the number of samples.
The simplest to model an analog system behavior is to provide at its input sinusoidal stimuli. In case of VHDL model we can use a sampled sinusoidal stimuli. For simple linear time-invariant systems the response is a sinusoid. The amplitude and the phase of the response characterizes the system.
More precisely, the stimulated system goes through two phases;

the initial phase is a transient situation normally described by a set of differential and algebraic equations and
the steady-state response to which the excitated system converges after a certain time delay.

The following VHDL example describes a simple operational amplifier. In this description we model only the steady-state response of the amplifier. The description of the amplifier is preceded by the definition of analog data package. The analog_defs package contains some basic definitions of physical types used in the following models. Note that the type analog_signal is a record of voltage and current types.

package analog is

type voltage is range 0 to integer'high

units

mV; -- milivolts

V = 1000 mv; -- volts

end units;

type current is range 0 to integer'high

units

mA; -- miliamperes

A = 1000 mA; -- amperes

end units;

type impedance is range 0 to 1E9

units

Ohm; -- ohms

KOhm = 1000 Ohm; -- kiloohms

MOhm = 1000 KOhm; -- megaohms

end units;

type analog_signal is record

v: voltage;

i: current;

end record;

end analog;

-- operational amplifier

use work.analog.all;

entity operational_amp is

generic(opamp_delay: time:=15 ns);

port(plus_in, minus_in: in analog_signal;

output: out analog_signal;

pwr,gnd: in analog_signal);

end op_amp;

-- operational amplifier architecture

architecture behavioral of operational_amp is

constant voltage_gain: real:= 500.0;

begin

output.v <= voltage_gain * (plus_in.v - minus_in.v) after opamp_delay;

end behavioral;

VHDL-AMS

VHDL-AMS (1076.1) is a superset of VHDL'93 which allows to describe mixed-signal and analogue systems that exhibit continuous behavior. The design of analogue extension to VHDL began in 1993. This work it was supported by DACS (Design Automation Standards Committee of the Computer Society of the IEEE) and by JESSI (Joint European Silicon Software Initiative) and several industrial organizations.
The essential enhancements introduced into VHDL-AMS are:

support for quantities and terminals representing analogue signals and network connectivity
support for simultaneous equations to model analogue behavior
support for break mechanism required to model discontinuities in analogue signals

The modeling space covered by VHDL-AMS is presented in the table below:

	continuous time	discrete time
continuous signal	differential and algebraic equation (DEA) systems analog components and circuits	switched capacitor circuits sample and hold
discrete signal	digital-to-analog converters	analog-to-digital converters sampled systems digital components and systems

Quantities

Quantity is a new class of objets allowing to model analytic functions in time and frequency domains. Quantities may represent voltage, current, velocity and other physical values evolving continuously in time and/or in frequency domains. Quantities are simple or complex objects built from floating point types.
Quantities may be declared inside an architecture as internal object or in a port list as imported/exported object.

quantity ra,rb: real;
entity simple is
port(quantity qin: in real; quantity qout: out real); -- interface quantity
end simple;

The quantities allows to describe the systems of ordinary differential and algebraic equations (DAEs) having the form of:

F(dX/dt,X,t) = 0

where F is a vector of expressions, X is the vector of unknowns in the equations, dX/dt is the vector of derivatives of the unknowns with respect to time and t is time. Most of DAEs have no analytic solution, in practice they must be resolved by use of numerical methods.
VHDL-AMS provides a notation for DAEs but does not provide any specific techniques for their solution. This approach allows the implementer to choose the appropriate method (analog solver) for the solution of the equations. The precision of the solution is indicated through the concept of tolerance. The tolerance may be selected according to the number of accurate digits needed in the solution.
VHDL-AMS supports the notion of tolerance groups defined as a collection of solution elements and characteristics having the same accuracy requirements. The type of tolerance (tolerance code) is a string that can be defined by the user e.g.. "maxtol", "abstol", .. .

quantity cur1: current tolerance "abstol";

There are two kinds of implicit quantities associated to an explicit quantity quant:

derivated quantity with respect to time denoted as quant'dot and
integer quantity over time (from time 0.0 to now) quant'integ.

Branch quantity

Branch quantities are used to express the values of electrical natures between two terminals. There are two kind of branch quantities:

across quantities like voltage and
through quantities like current.

More generally, the branch quantities reflect different natures of physical phenomena (see some examples below)

`nature`	`across`	`through`
electrical	voltage	current
mechanical	velocity	force
thermal	temperature	heat float rate

The constitutive equations of conservative systems are described by relating the across and through quantities of one or several branches.

The attributes across and through allow the user to extract the corresponding natures of the indicated object:

The nature or nature type may be declared as a vector:
Terminal, like a signal can be a port of an entity. The following example shows a simple resistor model with two terminals, the input terminal rin and the output terminal rout:
If a branch quantity is declared as "simple terminal" then a reference terminal (node) is created. It is designated by ter'reference attribute. The reference attribute is considered as ground terminal,. A simple terminal declaration creates a branch to ground.
The declaration of a terminal itself provides two quantities:
The possibility to create behavioral analog descriptions for complex analog components is one of the main advantages of VHDL-AMS. However, with VHDL-AMS one can also build structural descriptions from the interconnected simple components. Note that this style of modeling is specific to Spice design environments.
For example a half wave rectifier built from a diode, capacitor and resistor components can be described as follows ( resistor model , diode model and capacitor model are presented above):

Analog simulation basics

VHDL and analog systems

VHDL-AMS

Quantities

Branch quantity

Simultaneous statements

Building structures

Procedural statements

Simulation time and cycle

Analog-digital and digital-analog events

`break` statement

Bouncing ball