SLC1657 Evaluation Kits

There are three SLC1657 evaluation kits available. They are based on Agere, Altera and Xilinx FPGAs. Table 1 shows each of the kits, along with a schematic diagram, bill of materials and a typical routing performance report. Each kit includes:

• Evaluation board with either Agere, Altera or Xilinx FPGA.
• 16-key keypad.
• 16 x 1 LCD display.
• 5.0 MHz crystal oscillator.
• Timer/counter oscillator (1 KHz).
• PC parallel port (Centronics compatible) download cable and software.
• Embedded ROM with a generic and four-function calculator ROMs.
• 9 VDC battery pack. The board can also be powered with a DC power supply.
• Sample application software (assembly and 'C').
• Technical reference manual.
• PIC® compatible assembler or 'C' compiler is not included.

 

Table 1. Summary of the SLC1657 evaluation kits.
Evaluation Kit	Image (Click to Enlarge)	Additional Information
Agere ORCA 3L FPGA		Agere ORCA 3L routing results (23 Kb) PCB, schematic diagram (42 Kb) PCB, bill of material (60 Kb)
Altera FLEX 10KE FPGA		Altera FLEX 10KE routing results (24 Kb) PCB, schematic diagram (42 Kb) PCB, bill of material (60 Kb)
Xilinx Spartan 2 FPGA		Xilinx Spartan 2 routing results (23 Kb) PCB, schematic diagram (43 Kb) PCB, bill of material (60 Kb)

The evaluation kits allow familiarization with the Silicore™ SLC1657 microcontroller. This is done with three activities:

• Demonstrate the use of a fixed ROM. Fixed ROMs are similar to the 'flash RAM' capability in other microcontroller ICs. In this mode, the FPGA is configured as a SLC1657 microcontroller. Once configured, the microcontroller boots up like any other microcontroller. Two fixed ROMs are included with each board. The first runs an assembly language program that displays the features of the core on an LCD, and also has a sample stopwatch function. A second ROM runs a 'C' language program that makes the board operate as a four function calculator. All assembly language and 'C' source code is included with the kit.
  
• Demonstrate the software download capability of the core. In this mode, the FPGA is booted from a PC compatible parallel port interface. This interface itself is actually a VHDL entity that has been added to the microcontroller. In this mode software is assembled or compiled on a desktop PC and downloaded to the SLC1657. The PC compatible download cable, software and sample assembly code are included with the kit. The download software works with any MS-DOS or Windows compatible PC. Sorry, the software does not work with Windows NT (because of security blocks to the parallel port on that operating system).
  
• When combined with the developer's kit (which includes all VHDL source code and test benches), the SLC1657 evaluation kit
  allows the user to synthesize the core and run it on the evaluation board hardware. This verifies that the user's synthesis software works correctly. This function requires the purchase of the SLC1657 developer's kit.

This page last updated: October 17, 2001

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